This is historical information of device classes implemented in BmcmESRF device server.
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Development status:
Released
Information status: New
Contact:
Class Description
The aim of this project is to measure 3 currents feeding the 3 following magnets families in the Booster: Dipole, Focusing quadrupoles, Defocusing quadrupoles. The project is using the Dance board of ESRF connected to a measurement board developed by the Power Supply group. The DANCE board is a platform connecting a COMEX board with a FPGA (spartan6) via a PCIe communication The FPGA is interfacing the 3 ADC of the Power Supply board and provides data and registers for settings. This class BMCM (BoosterMagnetsCurrentMeasurement) is running on the COMEX (Intel Atom 32bits) and is in charge of controlling the FPGA registers and acquiring data.
Families: AcceleratorComponents
Key words:
Platform: Unix Like
Language: Cpp
License: GPL
Contact:
Hardware
Manufacturer: ESRF
Product:
Dance
Bus: PCI Express
Class interface
Attributes:
| Name | Description |
|---|---|
| modeScalar: DevShort | Define the acquisition mode. 0 -> Current measurement: 4 samples per period for each 3 channels 1 -> Test lab: continuous acquisition with drate@125kSPS. No trigger. |
| delayFromTriggerScalar: DevULong | This delay corresponds to the interval time between the trigger and the first sample measured in the period. |
| sampleNumberScalar: DevUShort | This corresponds to the total number of samples to measure in the period. It is not yet implemented. This number of samples could be associated with an interval time set by the user between each samples. |
| continuousBufferSizeScalar: DevULong | For the acquisition modes using ring buffer (continuous acquisition / triggered acquisition with continuous enable), this attribute set the size of the ring buffer. |
| lastAdc1Scalar: DevDouble | Last Dipole current measured |
| lastAdc2Scalar: DevDouble | Last Qf current measured. Valid when recordNu is disable. |
| lastAdc3Scalar: DevDouble | Last Qd current measured Valid when recordNu is disable. |
| triggerScalar: DevBoolean | True : first sample acquire at delay from trigger False : no trigger |
| simulTriggerScalar: DevBoolean | This attribute is useful for test purpose. If the External Trigger is not plugged on the board, the trigger is simulate. ADC data will be stored with the delay specified in the REG1 (delayFromTrigger scalar attribute). |
| drateScalar: DevShort | This is an ADC parameter. Defined the Sampling rate of the ADC. 0 -> 125 kSs 1 -> 250 kSs 2 -> 500 kSs |
| adcSclkScalar: DevShort | 0 0 -> SCLK from ADC 0 1 0 -> SCLK from FPGA, F=??? 2 0 1 -> SCLK from FPGA, F=32MHz 1 1 1 -> SCLK from FPGA, F=??? 3 |
| cleaningModeScalar: DevBoolean | Enable/Disable the cleaning. This is directly linked to the FPGA register. Cleaning is FPGA internal processing. It can be enable/disable for both modes Current Measurement and Test Lab. |
| lastTuneXScalar: DevDouble | Last Tune X measured. Valid when recordNu is enable |
| lastTuneZScalar: DevDouble | Last Tune Z measured. Valid when recordNu is enable |
| tuneFrequencyOffsetScalar: DevULong | Set the Tune frequency offset (for DAC) for cleaning mode. |
| tuneAmplitudeScalar: DevDouble | Set the Tune amplitude (for DAC) for cleaning mode. |
| tuneGainScalar: DevDouble | Set the Gain of the Tune for the cleaning mode. |
| tuneContinuousScalar: DevBoolean | Enable/Disable permanently tunes computed. |
| recordNuScalar: DevBoolean | Enable/Disable recording Nux & Nuz instead of Qf and Qd. When Enable, spectrum Qf & Qd are empty (ignored). |
| fpgaVersionScalar: DevDouble | Read the FPGA version |
| fpgaIsRunningScalar: DevBoolean | Check if the FPGA has already been set. If FALSE, the default settings are applied. |
| dsVersionScalar: DevDouble | Read the Tango Device Server version |
| DSpectrum: DevDouble | There are 3 ADC measuring Magnets Current on the Acquisition board: 3 ADC -> Dipole, Focusing Quadrupoles, Defocusing Quadrupoles. Correspondence between ADC and Magnet current: ADC1 -> Dipole (DipoleCurrent) ADC2 -> Focusing Quadrupole (QfCurrent) ADC3 -> Defocusing Quadrupole (QdCurrent) |
| QfSpectrum: DevDouble | There are 3 ADC measuring Magnets Current on the Acquisition board: 3 ADC -> Dipole, Focusing Quadrupoles, Defocusing Quadrupoles. Correspondence between ADC and Magnet current: ADC1 -> Dipole (DipoleCurrent) ADC2 -> Focusing Quadrupole (QfCurrent) ADC3 -> Defocusing Quadrupole (QdCurrent) |
| QdSpectrum: DevDouble | There are 3 ADC measuring Magnets Current on the Acquisition board: 3 ADC -> Dipole, Focusing Quadrupoles, Defocusing Quadrupoles. Correspondence between ADC and Magnet current: ADC1 -> Dipole (DipoleCurrent) ADC2 -> Focusing Quadrupole (QfCurrent) ADC3 -> Defocusing Quadrupole (QdCurrent) |
| NuxSpectrum: DevDouble | When Cleaning and Record Nux &Nuz are enabled, the tune data processed are recorded instead of current. Qf -> Nux Qd -> Nuz |
| NuzSpectrum: DevDouble | When Cleaning and Record Nux &Nuz are enabled, the tune data processed are recorded instead of current. Qf -> Nux Qd -> Nuz |
Commands:
| Name | Description |
|---|---|
| StateInput: DevVoid Output: State Device state |
This command gets the device state (stored in its device_state data member) and returns it to the caller. |
| StatusInput: DevVoid Output: ConstDevString Device status |
This command gets the device status (stored in its device_status data member) and returns it to the caller. |
| MeasurementsStartInput: DevVoid Output: DevVoid |
Start measurements. The sequence is as following: - Write the parameters to FPGA registers. Parameters are: ->delayFromTrigger ->sampleNumber ->settings (which is a combination of mode, drate and adcSclk) ->DAC1 (DAC frequency offset in Hz) ->DAC2 (DAC amplitude) - Start FPGA measurement - Wait FPGA filled a RAM - Read the RAM - Loop the 2 last steps until MeasurementsStpo is called or number of period requested is reached (mode 1 & 2) - Quit the Measurements acquisition thread |
| MeasurementsStopInput: DevVoid Output: DevVoid |
Stop the measurements. This command will stop the mesurements even if the number of period requested has not been reached (in mode 1 & 2). |
| ParametersUpdateInput: DevVoid Output: DevVoid |
This command allows to write parameters to FPGA without starting an acquisition. |
| FpgaControlRegistersReadInput: DevUShort Output: DevVarULongArray |
Read some control registers of the FPGA. The input argument defines the number of register to read. The command returns the value of each registers. |
| FpgaControlRegistersWriteInput: DevVarLongArray Output: DevVoid |
Write a value to a setting register of the FPGA. The input arguments are the register address and the value. arg1 -> Address of the register arg2 -> Value to write in the register Address range :0 to 16 Value range :0 to 4294967295 (unsigned 32bits) Address 0 -> register 0 -> control register Address 1 -> register 1 -> delay from Trigger Address 2 -> register 2 -> number of Samples Address 3 -> register 3 -> settings (mode, drate, triggers, ...) Address 4 -> register 4 -> DAC Frequency offset Address 5 -> register 5 -> DAC Amplitude & Tune gain |
| FpgaRamReadInput: DevVarUShortArray Output: DevVarULongArray |
Read the RAM of the FPGA. The input arguments define the number of register to read in a given RAM offset. arg1 -> RAM offset: set to 0 for the first ram, set to 1 for the second ram. arg2 -> Number of Register: 1 to 32768. |
| FpgaRAMResetInput: DevVoid Output: DevVoid |
Reset the whole RAM to 0. |
Pipes:
Properties:
| Name | Description |
|---|---|
| DataReadTimeOutDevShort | Time to wait in milliseconds when waiting the data from the FPGA. |
| WaitOnTriggerDevBoolean | Allow the possibility to start the trigger on demand. In this case, the FPGA will wait indefinitely until the trigger pulse arrived. So the DS will catch a time out error. If this property is set to TRUE, the DS will set a infinite time out. |
| TuneD_offsetDevULong | Dipole offset for tune processing |
| TuneQf_offsetDevULong | Quadripole focusing offset for tune processing |
| TuneQd_offsetDevULong | Quadripole defocusing offset for tune processing |
| CurrentD_offsetDevULong | Offset of the ADC measuring the current of the Dipole |
| CurrentD_gainDevDouble | Gain of the ADC measuring the current of the Dipole |
| CurrentQf_offsetDevULong | Offset of the ADC measuring the current of the Quadripole focusing |
| CurrentQf_gainDevDouble | Gain of the ADC measuring the current of the Quadripole focusing |
| CurrentQd_offsetDevULong | Offset of the ADC measuring the current of the Quadripole defocusing |
| CurrentQd_gainDevDouble | Gain of the ADC measuring the current of the Quadripole defocusing |
23 Feb 2017, Piotr Goryl
Updated:
The device class has been updated.
You can see previous version here .
19 Jan 2017, Piotr Goryl
Updated:
The device server has been updated.
You are looking at this version now.
2 Jan 2017, Piotr Goryl
Created:
The device server has been added to catalogue.
Updated:
The device class has been updated.
You can see previous version here .
19 Jan 2017, Piotr Goryl
Updated:
The device server has been updated.
You are looking at this version now.
2 Jan 2017, Piotr Goryl
Created:
The device server has been added to catalogue.
Added by:pgoryl2
on:19 Jan 2017, 10:32 a.m.